1. Field of the Invention
The present invention is directed in general to Non-Volatile Memories (NVM) and methods for operating same. In one aspect, the present invention relates to a method and apparatus for obtaining the current-voltage (I-V) curves of memory cells in Flash or electrically erasable programmable read only memories (EEPROM).
2. Description of the Related Art
Flash and electrically erasable, programmable, read-only memory (EEPROM) are types of non-volatile memory (NVM) used for non-volatile memory storage of information for data processing systems, such as microcontrollers, microprocessors, computers and other electronic devices (such as automotive embedded controllers) that store data that needs to be saved when power is removed from the device. EEPROM cells and Flash memory cells, can be characterized with a bitcell current-voltage (I-V) curve which plots the drain current conducted by the EEPROM cell based on the voltage applied to its word line (with the bit line set to a particular voltage). The NVM bitcell I-V curve is a useful diagnostic tool for failure analysis, investigating bitcell issues and potentially identifying imminent bitcell related failures. For instance, a bit having bad transconductance (Gm) can be determined with use of the I-V curve for the bitcell when the slope of the plotted I-V curve of the bitcell deviates from normal, so that it can be detected before it become failure in the field application. Moreover, bitcell I-V curves can help identify other type of potential issues like leaky bitcells, as well as determine short and open bitcells. Those issues are increasingly a concern as dimensions for NVM memory cells continue to shrink, thereby raising reliability and performance issues that can result in a failure condition of the NVM. Conventional diagnostic techniques for generating a bitcell current-voltage (I-V) curve for multiple bitcells use Parametric Measurement Unit (PMU) hardware to take multiple current measurements while sweeping the gate voltage, but these techniques are slow and require testing hardware (e.g., the PMU hardware or equivalent equipment) that is not readily available in most user application environment. In addition, the drain current output pin is typically not accessible at user mode with embedded NVM applications.